Forum Post: RE: ADS1220: Issue with Configuration and Inconsistent Raw Data Readings

please check my code #ifndef INC_ADS1220_H_ #define INC_ADS1220_H_ #include "main.h" // Your project's main should include HAL //Commands #define ADS1220_RESET 0x06 // Good idea to reset on power-up #define ADS1220_START 0x08 // Both single-shot and continuous conversion must be started via 0x08 #define ADS1220_WREG 0x40 #define ADS1220_RREG 0x20 //Registers #define ADS1220_CONFIG_REG0_ADDRESS 0x00 #define ADS1220_CONFIG_REG1_ADDRESS 0x01 #define ADS1220_CONFIG_REG2_ADDRESS 0x02 #define ADS1220_CONFIG_REG3_ADDRESS 0x03 //Masks #define ADS1220_REG_CONFIG1_DR_MASK 0xE0 #define ADS1220_REG_CONFIG0_PGA_GAIN_MASK 0x0E #define ADS1220_REG_CONFIG0_MUX_MASK 0xF0 //Sample rate #define ADS1220_DR_20SPS 0x00 #define ADS1220_DR_45SPS 0x20 #define ADS1220_DR_90SPS 0x40 #define ADS1220_DR_175SPS 0x60 #define ADS1220_DR_330SPS 0x80 #define ADS1220_DR_600SPS 0xA0 #define ADS1220_DR_1000SPS 0xC0 //PGA gain settings #define ADS1220_PGA_GAIN_1 0x00 #define ADS1220_PGA_GAIN_2 0x02 #define ADS1220_PGA_GAIN_4 0x04 #define ADS1220_PGA_GAIN_8 0x06 #define ADS1220_PGA_GAIN_16 0x08 #define ADS1220_PGA_GAIN_32 0x0A #define ADS1220_PGA_GAIN_64 0x0C #define ADS1220_PGA_GAIN_128 0x0E //Input mux #define ADS1220_MUX_AIN0_AIN1 0x00 #define ADS1220_MUX_AIN0_AIN2 0x10 #define ADS1220_MUX_AIN0_AIN3 0x20 #define ADS1220_MUX_AIN1_AIN2 0x30 #define ADS1220_MUX_AIN1_AIN3 0x40 #define ADS1220_MUX_AIN2_AIN3 0x50 #define ADS1220_MUX_AIN1_AIN0 0x60 #define ADS1220_MUX_AIN3_AIN2 0x70 #define ADS1220_MUX_AIN0_AVSS 0x80 #define ADS1220_MUX_AIN1_AVSS 0x90 #define ADS1220_MUX_AIN2_AVSS 0xA0 #define ADS1220_MUX_AIN3_AVSS 0xB0 #define Monitor_Bypass 0xC0 #define AVDD_AVSS_Bypas_Negative 0xD0 #define AVDD_AVSS_Bypass_Positive 0xE0 #define _BV(bit) (1 cfg_reg0);//0x40 ADS1220_writeRegister(hspi, ADS1220_CONFIG_REG1_ADDRESS, r->cfg_reg1);//0x04 ADS1220_writeRegister(hspi, ADS1220_CONFIG_REG2_ADDRESS,r->cfg_reg2);//0x10 ADS1220_writeRegister(hspi, ADS1220_CONFIG_REG3_ADDRESS, r->cfg_reg3);//0x00 HAL_Delay(10); uint8_t CR0 = ADS1220_readRegister(hspi, ADS1220_CONFIG_REG0_ADDRESS); uint8_t CR1 = ADS1220_readRegister(hspi, ADS1220_CONFIG_REG1_ADDRESS); uint8_t CR2 = ADS1220_readRegister(hspi, ADS1220_CONFIG_REG2_ADDRESS); uint8_t CR3 = ADS1220_readRegister(hspi, ADS1220_CONFIG_REG3_ADDRESS); return (CR0 == r->cfg_reg0 && CR1 == r->cfg_reg1 && CR2 == r->cfg_reg2 && CR3 == r->cfg_reg3); } void ADS1220_start_conversion(SPI_HandleTypeDef *hspi) { // const uint8_t cmd = ADS1220_START; HAL_GPIO_WritePin(GPIOE, GPIO_PIN_12,RESET); HAL_Delay(5); HAL_SPI_Transmit(hspi, &cmd1, 1, 100); HAL_Delay(5); HAL_GPIO_WritePin(GPIOE, GPIO_PIN_12,SET); } void ADS1220_enable_PGA(SPI_HandleTypeDef *hspi, ADS1220_regs *r) { r->cfg_reg0 &= ~_BV(0); ADS1220_writeRegister(hspi, ADS1220_CONFIG_REG0_ADDRESS, r->cfg_reg0); } void ADS1220_disable_PGA(SPI_HandleTypeDef *hspi, ADS1220_regs *r) { r->cfg_reg0 |= _BV(0); ADS1220_writeRegister(hspi, ADS1220_CONFIG_REG0_ADDRESS, r->cfg_reg0); } void ADS1220_set_conv_mode_continuous(SPI_HandleTypeDef *hspi, ADS1220_regs *r) { r->cfg_reg1 |= _BV(2); ADS1220_writeRegister(hspi, ADS1220_CONFIG_REG1_ADDRESS, r->cfg_reg1); } void ADS1220_set_conv_mode_single_shot(SPI_HandleTypeDef *hspi, ADS1220_regs *r) { r->cfg_reg1 &= ~_BV(2); ADS1220_writeRegister(hspi, ADS1220_CONFIG_REG1_ADDRESS, r->cfg_reg1); } void ADS1220_set_data_rate(SPI_HandleTypeDef *hspi, int datarate, ADS1220_regs *r) { r->cfg_reg1 &= ~ADS1220_REG_CONFIG1_DR_MASK; r->cfg_reg1 |= datarate; ADS1220_writeRegister(hspi, ADS1220_CONFIG_REG1_ADDRESS, r->cfg_reg1); } void ADS1220_select_mux_config(SPI_HandleTypeDef *hspi, int channels_conf, ADS1220_regs *r) { r->cfg_reg0 &= ~ADS1220_REG_CONFIG0_MUX_MASK; r->cfg_reg0 |= channels_conf; ADS1220_writeRegister(hspi, ADS1220_CONFIG_REG0_ADDRESS, r->cfg_reg0); } void ADS1220_set_pga_gain(SPI_HandleTypeDef *hspi, int pgagain, ADS1220_regs *r) { r->cfg_reg0 &= ~ADS1220_REG_CONFIG0_PGA_GAIN_MASK; r->cfg_reg0 |= pgagain; ADS1220_writeRegister(hspi, ADS1220_CONFIG_REG0_ADDRESS, r->cfg_reg0); } uint8_t* ADS1220_get_config(SPI_HandleTypeDef *hspi, ADS1220_regs *r) { static uint8_t cfgbuf[4]; r->cfg_reg0 = ADS1220_readRegister(hspi, ADS1220_CONFIG_REG0_ADDRESS); r->cfg_reg1 = ADS1220_readRegister(hspi, ADS1220_CONFIG_REG1_ADDRESS); r->cfg_reg2 = ADS1220_readRegister(hspi, ADS1220_CONFIG_REG2_ADDRESS); r->cfg_reg3 = ADS1220_readRegister(hspi, ADS1220_CONFIG_REG3_ADDRESS); cfgbuf[0] = r->cfg_reg0; cfgbuf[1] = r->cfg_reg1; cfgbuf[2] = r->cfg_reg2; cfgbuf[3] = r->cfg_reg3; return cfgbuf; } int32_t ADS1220_read_blocking(SPI_HandleTypeDef *hspi, GPIO_TypeDef *DRDY_PORT, uint16_t DRDY_PIN, uint16_t timeout) // Timeout should be at least as long as sampletime+some clock cycles, obviously { uint8_t SPIbuf[3]; int32_t result32 = 0; long int bit24; uint8_t time = 0; while (HAL_GPIO_ReadPin(DRDY_PORT, DRDY_PIN) == GPIO_PIN_SET) { HAL_Delay(1); // This is a bit hacky time++; if (time >= timeout) return 0; } HAL_GPIO_WritePin(GPIOE, GPIO_PIN_12,RESET); HAL_Delay(5); HAL_SPI_Receive(hspi, SPIbuf, 3, 100); HAL_Delay(5); HAL_GPIO_WritePin(GPIOE, GPIO_PIN_12,SET); bit24 = SPIbuf[0]; bit24 = (bit24 > 8); //Converting 24 bit two's complement to 32 bit two's complement return result32; } int32_t ADS1220_read_singleshot(SPI_HandleTypeDef *hspi, GPIO_TypeDef *DRDY_PORT, uint16_t DRDY_PIN, uint16_t timeout) { ADS1220_start_conversion(hspi); HAL_Delay(100); return ADS1220_read_blocking(hspi, DRDY_PORT, DRDY_PIN, timeout); HAL_Delay(1000); } int32_t ADS1220_read_singleshot_channel(SPI_HandleTypeDef *hspi, uint8_t channel_num, ADS1220_regs *r, GPIO_TypeDef *DRDY_PORT, uint16_t DRDY_PIN, uint16_t timeout) { int32_t ADC_Raw=0; // ADS1220_select_mux_config(hspi, channel_num, r); HAL_Delay(100); ADS1220_start_conversion(hspi); HAL_Delay(100); ADC_Raw=ADS1220_read_blocking(hspi, DRDY_PORT, DRDY_PIN, timeout); HAL_Delay(1000); return ADC_Raw; } #endif /* INC_ADS1220_H_ */ int main() { ADS1220_regs regs = ADS1220_default_regs; ADS1220_init(&hspi1, &regs); / while(1) { ch1 = ADS1220_read_singleshot_channel(&hspi1,ADS1220_MUX_AIN1_AIN0, &regs, GPIOA,GPIO_PIN_2, 100); HAL_Delay(1000); } }