"Also, my point about the SPI mode is to make sure you are capturing data correctly, regardless of what the mode # is in the MCU config screen. The sysconfig image you provided says "SPI mode 1, rising edge". I am not sure that is what you want. In the image below that you previously included, the data capture is incorrect. You don't want to capture data on the edges - see how the falling edge of SCLK is always on the edges of the MOSI transitions? That is not what you want , and it makes sense that the logic analyzer interpreted 0xC400 on MOSI, which is not even a valid command for the M04!" To answer the above point, so when i set both the configuration (of logic analyzer and MCU Texas F280039C) as CPOL=0, CPHA=1 and tries to send command as 0x6200 logic analyzer treats that as 0xC400 as it is capturing the data at falling edge which is correct for logic analyzer as per settings and standard (refer image below) but i think MCU at setting CPOL=0, CPHA=1 MOSI is not able to send data as per standard as it is doing level transition at falling edge of the clock rather than the rising edge. That's why for the same data command of 0x6200 from MCU logic analyzer is treating that as 0xC400. Is something i am missing in MCU setting.
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