Basically, if the lower 10 bits are always saturated then the ADC is unable to resolve an input level that is less than 2^10/2^16 of its full-scale input range. In other words, the ADC is behaving like a 6-bit ADC. This sort of thing is generally associated with excessive drops in the reference voltage due to changing cap loads on the ref pin during the conversion process. Large bypass caps are required for good load regulation of the reference voltage. In your case the 4.7uF may be marginal. I would recommend trying out a 22uF cap or greater to see if it makes a difference. Also, at what sampling rate are you using the ADC? Your input RC circuit needs about 3.2ms (12 to 13 time constants) to settle fully (error < 1LSB). So if you haven't tried it already, please decrease your sampling rate (use sampling period >3.2ms) and let me know if that makes a difference.
Thanks,
Harsha