Hi, I am new to high-performance ADC's (and ADC's in general) so excuse me if my questions are a bit basic. The ADC I'm trying to use is the ADS1274. I'll always be using the device in high resolution mode. I'll be using the SPI output interface, and driving both the CLK and the SCLK pins with 27 MHz clock signal.
1) Given that I don't want to change mode of operation, what is the role of the *sync pin? If I don't need to synchronize the device with any external events do I simply tie it high? Additionally, why does the data sheet say that *SYNC should be re-asserted (I'm assuming this means pulsed low) after device power on when data first appear? In practice would this need to be done manually with a physical switch?
2) When using SPI output, how is the *DRDY to be interpreted exactly? Page 30 of the datasheet says that data ready for retrieval are indicated by the falling edge of *DRDY, then can the data always be assumed to be valid anytime the pin is low? It goes on to say that the pin returns high on the the falling edge of SCLK. Can anyone explain this operation in more detail? I am failing to connect the dots here.
3) Page 30 of the datasheet says that, in SPI protocol (without any reference to either TDM or discrete DOUT mode), conversion data are output on DOUT[4:1], which I take to mean the output bits for each channel are pushed to their separate individual corresponding output pins. Page 32 then elaborates on 2 DOUT modes, saying that TDM mode will push the data from all channels serially through a single output pin (time-division multiplexing, which I understand in principle). These two pieces of information seem conflicting to me. How should I be understanding this?
4) Discrete data output mode. I conceptually understand of pushing data out in parallel on the separate output pins (this is what I thought the datasheet was describing on page 30 in reference to the SPI protocol in general, see #3). What I don't understand is how this mode is usable if, as the datasheet describes on page 32, the channel data are forced to zero after 24 cycles of SCLK. What is the utility in this mode of operation? Could you use it to record data over a period of time longer than (24*SLCK_period) ? If so, how?
5) What should I do with the following pins (eg. power, ground) if they are not being used?
- DOUT
- AINP
- AINN
-VCOM
PWDN5,6,7,8 for the ADS1274
Thank you in advance for any help or advice!
Regards,
Dominic Ryan
Novice ADC user with many, many questions