Marco,
datasheets are under revision to expose some more registers.
In the hardware domain, you will have to use 2 pins to bring in your 12MHz, into the PLL, then out of a GPIO.
That GPIO will then be externally connected to the SCK (master clock in. The device will think that you are in-fact bringing in an audio rate BCK.
Please let me know which GPIO you would like to bring your 12MHz in on, and which your like your Audio Master Clock output on.
I will provide the specific register writes to achieve that functionality. (before we get the datasheet cleaned)
Best regards
/DAfydd