Hi Norman, The ADS8689 device moves from ACQ state to CONV state on the rising edge of the CONVST/CS signal. The conversion process uses an internal clock and the device ignores any further transitions on the CONVST/CS signal until the ongoing conversion is complete (that is, during the time interval of tconv). At the end of conversion, the device enters ACQ state. Hence, shorter /CS time in your case will not affect the ADC's conversion. Please notice that the conversion time, tconv, can vary within the specified limits of tconv_min and tconv_max (as specified in the Timing Requirements: Conversion Cycle table). After initiating a conversion, the host controller must monitor for a low-to-high transition on the RVS pin or wait for the tconv_max (5000ns for ADS8689 ) duration to elapse before initiating a new operation (data transfer or conversion). Thanks&Regards Dale
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