You cannot randomly access the VBUS registers like this. Do not access registers which you do not intend to access.
Do not write to reserved registers. This is clearly stated in the datasheet, section 4.1
E0/E1/E8 are special registers for accessing the internal processor bus and their values are not expected to be necessarily the same as those values written.
Please only read/write the registers which you actually need to change/monitor.
Given that these are the only registers which are now 'incorrect' I think we have found your issue. Please ensure first that the I2C clock rate is less than 400KHz. Next, either make sure you monitor SCL and implement clock stretching or include a delay after each transaction which is long enough to accomodate and clock stretching which might be occurring.
BR,
Steve