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Forum Post: RE: DAC8581 tUPDAC timing

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     Thanks for your help!

     Unfortunately, I specified the DAC8581 last December when the (then current) data sheet listed it as Active.  Oh, well...these things happen.


     Mainly, I need bipolar output, but the price is also critical.  The alternate part suggested on the ti website is nearly 3 times as expensive, as are all of the other bipolar-out candidates I've found.


     If it's not practical to use the DAC8581, I'll have to re-spec a unipolar part, plus a board spin.  I already have a dual op amp on the board as a quasi-differential output buffer.  Add 3 more resistors and a unipolar DAC will do.


     I see that there is significant 'factory stock' in reels claimed by at least one disti--although my boss resists lifetime buys.  Who should I contact to find out if an End Of Life or Last Buy date has been set for the DAC8581?


     I guess what I should have asked is, "What's going on internally during tUPDAC."


     Can I assume that it covers some internal analog process--and that it has nothing to do with the data latching from the shift register into the DAC register at the 16th SCLK fall?


     If I understand your comments correctly, then starting a new SPI transaction after tWAIT will not destroy the current sample until the next 16th SCLK fall.  This application will have no step-wise output changes and a microsecond or two of lag is not important.

Thanks again, Mark


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