Karl,
I am glad to hear that you were able to address the problem you were facing.
I did suspect reference, which is why I requested that you monitor the REFP during conversions, but your schematic looks correct. You probably have an issue with the layout - placement or the routing between the reference IC and the ADC. Just to satisfy my curiosity, could you please let me know if you have the root cause for the poor regulation? Thanks.
Good luck with your design.
Regards,
Sandeep