Forum Post: RE: Register Setting of TLV320AIC3206

Hi,

Several things:

1. You need to use # symbol for comments after the data bytes. Also, don't use '//'.
2. For PLL use (w/ 12MHz clock):
   1. J=8
   2. R=1
   3. D=1920
   4. P=1
   5. NDAC = 2 (on)
   6. NADC = 2 (off)
   7. MDAC = 8 (on)
   8. MADC = 8 (on)
   9. DOSR = 128
   10. AOSR = 128
3. The settings in blue below are written incorrectly. You need to switch back to page 0 after adaptive filter enable. 

w 30 00 00
#//ADC Setup
w 30 51 C0 #(ADC Channel Setup - L/R ADC Power Up)
w 30 52 00 #(ADC Fine Gain - L/R ADC Channel Unmute)
#//ADC Adaptive Filter
w 30 00 08
w 30 01 04 #(ADC Adaptive Filter Enable)
#//ADC to DAC
w 30 1D 10 #(ADC Output to DAC Input)
#//DAC Setup
w 30 3F D4 #(DAC Channel Setup - L/R DAC Power Up, Routing)
w 30 40 00 #(DAC Channel Setup - L/R DAC Channel Unmute)
#//DAC Adaptive Filter
w 30 00 2C
w 30 01 04 #(DAC Adaptive Filter Enable)

Regards,

J-