A 24.576MHz clock source is compatible with 32kHz, 48kHz, 96kHz and 192kHz sampling rates. It is not compatible with 44.1kHz (if that's what you require).
You cannot use a crystal directly. It has to be a oscillator with compatible logic levels and low phase jitter and noise (e.g. PLL1700 family). Ideally, the clock source should be the same clock that is used for your I2S master (what is you I2S master? Who generates LRCK_MAIN, DOUT_MAIN, BCK_MAIN ?