Hi,
We would like to confirm the output polarity of error pin and npcm pin as below.
(1) DIR Error Detection Output Polarity
Since we found that ERROR/INT0 pin becomes the high level during reset on page 17 of data sheet, we believe that this pin is active low.
Of course, we understand that we need to set default to register 20h.
Is our understanding correct?
(2) DIR Non-PCM Detection Output Polarity
Since we found that NPCM/INT1 pin becomes the low level during reset on page 17 of data sheet, we believe that this pin is active high.
Of course, we understand that we need to set default to register 20h and 28h.
In addition, we believe that if we set 1b to "NPCMP(NPCM Pin Output Polarity)" of register 28h, this pin is active low.
Is our understanding correct?
Best Regards,
Kato