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Forum Post: what is the sequence for powering down/up the AIC33

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We  are  using  the AIC33 as a master  in our project .

The  input lines we use are :  line2_LP and  line1_LP

The output lines  we use     :  MONO_LOP ,  LEFT_LOP  (Single ended )

When  we  take the  AIC33 from power  down  to  high  somtimes  there  is no output in one of the output lines , but the digital input is good .

Also the SPI  line  works well  ( like the spec says ) .

When we read  the register  79  MONO_LOP , we  get in D1 bit  value  '1'  ( Not all programmed gains to MONO_LOP/M have been applied yet ) , why is that .

Is there a robust sequence for entering and  leaving Low power for this device ?

Regards , Shlomo  Kabaz .

 

 

 


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