Thank you, Tom.
So, just to be clear, there are no internal metastability issues in ADS8363 with missing t1. Transition to hold occurs on the rising edge of CONVST regardless of the state of CLOCK. Acquisition throughput goes down by one CLOCK cycle, but otherwise operation proceeds normally if you violate t1.
Maybe I missed it, but I saw nothing in the data sheet to indicate that t1 is advisory for obtaining maximum throughput. Assuming I have understood, then TI should add that information to the specification.
Ian Lewis
www.mstarlabs.com