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Forum Post: RE: ADS4229 input clock to output clock delay variation

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I was wondering what it was between devices at the same temperature, but not necessarily over temperature. The datasheet states that the min is 5ns and max is 7.5ns, which is 2.5ns of variation possible. The datsheet does not specify if this is over temperature or between devices or a function of both. Does 700ps represent the max difference in skew between two ADCs at the same temperature or irrespective or temperature?


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