Hi,
That sentence is misleading, I think it should read:
“On the ADC1xDxxx(RF)RB board, the clocking device is configured for a frequency in this range in an xml script file and written over the SPI interface when the FPGA image is loaded. For convenience jumpers, J158 – J162, have been added so that when removed the clock is disconnected from the FPGA, allowing direct SPI writes with an external programming device to the clock."
And this sentence should be added to the following paragraph for RB2 versions of the board:
"If external clocking is desired, the device may disabled through the WaveVision 5 register control panel in addition to changing the position of R180 from B to A"
See the following thread for more information on how to modify the board for external clocking: http://e2e.ti.com/support/data_converters/high_speed_data_converters/f/68/p/304442/1061353.aspx#1061353