Hi Madhusudhan,
The restriction is not related to the time it takes to read out the data, but rather to the internal timing of the ADS1247 with respect to a register write. When writing to any of the first four registers the digital filter is reset. Certain timing and input voltages combintations have the potential of the digital filter not to be fully settled by the end of the conversion period (or not fully settled in a single-cycle). This can be avoided by following the restrictions in the datasheet.
You can operate the device with a slower SCLK, but you should then discard the first sample after you write to any of the first four registers. However, if you must have single-cycle data available (or fully valid data at the end of any conversion period) you must follow the guidelines on page 34 of the datasheet.
Best regards,
Bob B