Dear Ryan:
I would appreciate very much to get the actual schematics of the ADS1299EEG FE Rev A, because I found differences between the Analog Evaluation Module circuit I have and the circuit at Fig 59 (pag 50) of the SLAU443-May 2012
I need to define the BIASOUT/BIAS_DRV feedback routing pins for RLD with balanced inputs.
Best Regards
Anibal