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Forum Post: RE: ADS8528: Issue Writing to the Configuration Register

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Hello Tom,

I am not able to extract the data at this time, but I can describe what it looks like.

The ADS outputs data (after a slight delay) on the falling edge of SCLK and the McBSP transmit pin is outputting data on the rising edge of SCLK.

According to the user's guide for ClockStop =3, CLKRP = 1, CLKXP = 1, the  McBSP receives data on the falling edge. Because of the slight delay in the ADS outputting data, the last bit (the lowest order bit) will be missed.  Is that correct? 

I believe this is what is causing the data to be half of what it is suppose to be. 

The ADS8528 outputs data on the falling edge.  Does it also receive data on the falling edge?

Stephen

 


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