Thanks Jim for the updated schematic.
Talking about the four channel coming out from FMC: you are right, I knew it some weeks ago when I tried to read signals coming out from ADC12D1800RFRB in TR4 Altera board using this adapter. At the moment with this adapter we should be able to read only the two channel FMC_DI and FMC_DID with their clocks. So at the moment we are able to use ADC board in NON-DES DEMUX mode.
Our idea now deals with a digital down-conversion in the FPGA Virtex 4 on the board to try to put our bandwidth of interest in the baseband and after transmit it only in two channel out of the board for further signal processing.
Basically we have a signal bandwidth of interest of 400 MHz centered at 850 MHz. First we want to perform a digital down-conversion in baseband in the FPGA on the board. After that the two channel running at 900 MHz at the output of ADC would be enough to transmit the signal out from board.
In your opinion could be a good (feasible) idea? I am trying to understand if resources of Virtex 4 could be enough to perform DDC on this bandwidth.
Best regards
Giuseppe G