I seem to have my i2c issues sorted. I had to make calls directly to the i2c_master_send and i2c_master_recv functions. I was able to play some tones over the speaker and headphones using the beep generator so I think that pretty well says the speaker driver, headphone drvier and analog attenutaion stages are powered and working. I'm still unable to get any sound from the DACs though.
I'm somewhat confused by the role of the VOL/MICDECT pin. There is an arrow on page 2 of the datasheet that points down to the "Digital Vol 24dB to Mute" block. This block looks like it is controlled by the LDAC and RDAC volume controls on page 0 registers 64, 65 and 66. What effect does the volume pin have on this block?
Our circuit essentially has the MICBIAS pin fed into the VOL/MICDECT pin. I've tried multiple combinations of mic bias settings and it does appear to change the value of register 117 on page 0 when bit 7 of register 116 is set. Regardless of whether register 117 holds a value of 0 or 0x7E it doesn't appear to make a difference as to whether or not audio is being passed out of the DAC or not.
I don't understand the routing as stated in register 116 bit 7.
0: DAC volume control is controlled by control register (7-bit Vol ADC is powered down).
1: DAC volume control is controlled by pin.
Register 117 is read only and appears to get it's value based on the VOL/MICDECT pin. What "control register" does the above statement refer to when bit 7 of register 116 is 0? If it is referring to register 117 how am I supposed to control the volume when the register is read only? When bit 7 of register 116 is 0 the value of register 117 is stuck at 0x7E or -63dB.
Here are my current settings:
aic3100_print_regs: AIC3X_RESET(P0/R1): 0x0
aic3100_print_regs: OT_FLAG(P0/R3): 0x66
aic3100_print_regs: INTERFACE_SET_REG_1(P0/R27): 0x40
aic3100_print_regs: INTERFACE_SET_REG_2(P0/R29): 0x0
aic3100_print_regs: CLK_REG_2(P0/R5): 0x81
aic3100_print_regs: CLK_REG_3(P0/R6): 0x1
aic3100_print_regs: CLK_REG_4(P0/R7): 0x0
aic3100_print_regs: CLK_REG_5(P0/R8): 0x0
aic3100_print_regs: NADC_CLK_REG(P0/R18): 0x82
aic3100_print_regs: MADC_CLK_REG(P0/R19): 0x81
aic3100_print_regs: ADC_OSR_REG(P0/R20): 0x20
aic3100_print_regs: BCLK_N_VAL(P0/R30): 0x18
aic3100_print_regs: DOUT_CTRL(P0/R53): 0x2
aic3100_print_regs: ADC_FLAG(P0/R36): 0x80
aic3100_print_regs: NDAC_CLK_REG(P0/R11): 0x82
aic3100_print_regs: MDAC_CLK_REG(P0/R12): 0x81
aic3100_print_regs: DAC_OSR_MSB(P0/R13): 0x0
aic3100_print_regs: DAC_OSR_LSB(P0/R14): 0x20
aic3100_print_regs: DAC_CHN_REG(P0/R63): 0xd4
aic3100_print_regs: DIN_CTL(P0/R54): 0x2
aic3100_print_regs: DAC_MUTE_CTRL_REG(P0/R64): 0x0
aic3100_print_regs: AIC3100_LDAC_VOL(P0/R65): 0x0
aic3100_print_regs: AIC3100_RDAC_VOL(P0/R66): 0x0
aic3100_print_regs: DAC_FLAG_1(P0/R37): 0xba
aic3100_print_regs: DAC_FLAG_2(P0/R38): 0x11
aic3100_print_regs: OVERFLOW_FLAG(P0/R39): 0xe0
aic3100_print_regs: VOL_MICDECT_ADC(P0/R116): 0x80
aic3100_print_regs: VOL_MICDECT_GAIN(P0/R117): 0x0
aic3100_print_regs: GPIO_CTRL_REG_1(P0/R51): 0x2
aic3100_print_regs: ADC_PRB_SEL_REG(P0/R61): 0x4
aic3100_print_regs: ADC_FGA(P0/R82): 0x0
aic3100_print_regs: L_ANLOG_VOL_2_SPL(P1/R38): 0x80
aic3100_print_regs: DAC_MIX_CTRL(P1/R35): 0x44
aic3100_print_regs: CLASSD_SPEAKER_AMP(P1/R32): 0x86
aic3100_print_regs: SPK_DRIVER(P1/R42): 0x15
aic3100_print_regs: HEADPHONE_DRIVER(P1/R31): 0xd4
aic3100_print_regs: HP_SPK_ERR_CTL(P1/R30): 0x0
aic3100_print_regs: L_ANLOG_VOL_2_HPL(P1/R36): 0x80
aic3100_print_regs: R_ANLOG_VOL_2_HPR(P1/R37): 0x80
aic3100_print_regs: HPL_DRIVER(P1/R40): 0x37
aic3100_print_regs: HPR_DRIVER(P1/R41): 0x37
aic3100_print_regs: MIC_PGA(P1/R47): 0x0
aic3100_print_regs: MIC_GAIN(P1/R48): 0x30
aic3100_print_regs: AIC3100_MICBIAS_CTRL(P1/R46): 0x8