I'm interested in using two or more VC707 or other Xilinx boards (having dual FMC interfaces), each with two DAC348x EVMs connected through a translation board, like TI's FMC-DAC board. I'm concerned that there may be too few LVDS pairs on one of the FMC connectors on the VC707 to simply use two boards. A simple translation board that plugs into both FMCs with the 2 EVM LVDS data connectors may be the solution if there are fewer.
The second issue I'm concerned with is clock synchronization if I were have two or three VC707s, each with two DAC3484 EVMs connected as described. What is the best way to synchronize the clocks between the multiple DAC3484 EVM boards and Xilinx parts that drive the data to them?
Can someone tell me how this will work best and if there is ideally an off-the-shelf solution for this so that I don't have to do any design or incur any NRE, until after I've completed the proof of concept?