Hello J,
Thank you for the fast reply. I have made some progress, but I'm still having problems with the configurations. I do not have the I2S signals connected.
My Hardware:
The board I'm testing out is actually another AIC3256EVM-U, with the TAS1020 and the E2PROM removed. My MCU Application is currently running from a PIC18 Evaluation board. I have connected the I2C bus, the reset signal and GND to the stripped AIC3256EVM-U. I'm using an external function generator to generate 11.289MHz to MCKL.
1) Code verification
I verified the firmware by loading the same application to the unmodified AIC3256EVM-U via PPS and to the modified board via I2C from my PIC. I connected the MCKL, WCLK and BCLK from the unmodified AIC3256EVM-U, to the other board, and I got a tone out to my headphones.
An interesting thing, when MCKL was connected, it was actually enough to just touch the BCLK for a short instant and the Tone began to sound and remained after removing the BCLK connection.
I have configured the BCLK and WCLK as outputs and tried to set up the divider settings. I'm using the Coded Clock configuration, not the PLL. But I'm only getting a lot of white noise to my headphones. I have verified the MCLK, BCLK and WCLK with an Oscilloscope and they have the same frequencies as the unmodified EVM.
My clock configurations are as follows:
Codec Input Clock -> MCLK 11,2896MHz
DAC_CLK = 2,8 MHz
ADC_CLK = 2,8 MHz
DAC_MOD_CLK = 44,1 kHz
DAC_FS_CLK = 44,1 kHz
ADC_MOD_CLK = 44,1 kHz
ADC_FS_CLK = 44,1 kHz
At the moment my setup looks like following:
1: I reset the circuit
2: I write the complete (unmodified) register settings in the pps_driver.h
3: I write the following sequence
{ 0x00, 0x00}, // Page 0
{ 0x21, 0x00}, // Audio Interface Settings Page 0, Reg 32
{ 0x1B, 0x0C}, // Audio Interface Settings - WCLK & BCLK = Outputs
{0x0B, 0x84}, // NDAC divider - ON, Value 4
{0x0C, 0xC0}, // MDAC divider - ON, Value 64
{0x12, 0x84}, // NADC - ON, Value 4
{0x13, 0xC0}, // MADC - ON, Value 64
{0x0D, 0x00}, // DSOR Value 1
{0x0E, 0x01}, //
{0x14, 0x01}, // AOSR, Value 1
{0x1D, 0x14}, // Audio Interface settings reg 3, also tried 0
// {0x19, 0x00},
// {0x20, 0x00},
{ 0x1E, 0x81}, // BCLK ON, divider 1
{ 0x1A, 0x81}, // CLKOUT M divider ON, Value 1
Am I doing anything wrong here or am I missing to configure something?
Best regards
Johnny