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Forum Post: RE: Question for the Sidelobe noise and PLL Unlock of DAC3484

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Hi Jayden,

As I have mentioned in the previous response, it is not possible to use on-chip DAC3484 PLL with 138.24MHz input, and 2x interpolation due to the internal VCO range. 

If the customer would like to use 2x interpolation at 138.24MHz input, then we recommend to configure the DAC3484 with external clock input mode (on-chip PLL mode bypassed). Please see attached for register setting.

-Kang


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