Hi:
I am trying to generate a clock signal on the gpio1 pin of codec a using the AIC34 EVM. The clkdiv_in source is MCLK with default value of 11.2896MHz; however, I don't see any signal on gpio1-A. clkmux_out is set to 1 and the PLL is not enabled. I have tried different values of M and N; however, I don't see any signal on gpio1-A. SW2 on USB-MODEVM is set so that switches 1-7 are ON and 8 is OFF. I have observed MCLK=11.2896M and Fs(ref)=44.1K on a scope. I don't see anything on gpio1-A test pin on the AIC34 daughter card.
Is there any sequence in which the registers have to be programmed? I have tried this with/out PLL enabled, but to no avail.
Could you please help?
Thanks a lot!
Cheers,
Mushtaq